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While compiling my design, I got the following error at (or just after) the logic synthesis stage:
Error: TRI or OPENDRN buffer ':2310' can only drive logic if connected to a BIDIR pin
double clicking the thing points me to the line: PROCESS (clk,reset_n)
what is going on? and how do I fix it? I didn't use any TRI or OPENDRN buffers....
-- Vincent Lo (email@example.com), March 16, 1999
I got the same error when I tried to drive an internal SIGNAL of my design to high impedance. Check to make sure you only drive OUT or INOUT pins to Z.
Don't trust Altera's goto line with error feature... it rarely takes you to the line that actually has the problem.
-- Steven Truelove (firstname.lastname@example.org), March 16, 1999.
hmm... interesting... but the ONLY thing that i drive to 'Z' is dtack... any other explainations?
-- Vincent Lo (email@example.com), March 16, 1999.
You use a TRI/OPNDRN if you have any logic that implicitly creates a tristate buffer, such as
x <= 'Z' when y='1' else '0';
So signal x is really the output of a TRI buffer whose control signal is signal y.
If x (say dtackN) is an OUT pin this is fine. But if you try to use dtackN as an input *anywhere* (i.e. on the right-hand side of <= ) then you must declare the pin as INOUT (BIDIR).
Since dtackN doesn't need to be BIDIR, you probably are using it somewhere on the right of <=. Find that and get rid of it.
-- Robin Grindley (firstname.lastname@example.org), March 17, 1999.