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When I combine my VHDL file with the slave file, I got error message saying that I got multiple sources on my 68000 data bus and dtackN. I think this happens because some of the time my PCI bridge drives the bus and some of the time the slave drives the bus, causing Maxplus II to complaint the bus having two sources. (Although both parts don't drive the bus simultaneously.) This also applies to dtackN. Is there any way to solve this problem?
-- Roy Leung (firstname.lastname@example.org), March 15, 1999
This problem is actually discussed in the PUTTING IT TOGETHER in the handout. It stated that in your design you should assign you data and dtack output from the 2 devices (pci_bridge and pci_slave) to different header pins and connect them externally at the header. Exactly how you would do that, I would like the TA's to clearify.
-- Angus Cheung (email@example.com), March 16, 1999.
Yes, Angus is right. Just create 2 pins, bridge_dtackN and slave_dtackN. When wiring just connect *both* pins from the Altera header on the breadboard to the dtackN pin on the 68K header. Just make sure that your bridge only drives the bridge_dtackN line at the right times.
-- Robin Grindley (firstname.lastname@example.org), March 16, 1999.