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As you said in your previous mail, we hook up the following lines:
68k address: 23 68k control: 5 DRAM address: 9 DRAM control: 4 TOTAL: 41
If we do not connect up the 8 data lines, how do we make them high impedance when not doing a read/write operation? Also, for the refresh, am I correct in saying that as long as we generate a CAS before RAS every 15us, without specifying the exact word line, the refresh will work?
-- Shezad Okhai (email@example.com), January 29, 1999
If the /OE on the DRAM chips is off (high) then they will not drive, so just make sure that your default state has /OE high.
With a CAS-before-RAS refresh (not other types of refresh) you don't need to supply an external address. The DRAM chips have an internal counter that gets incremented every time a CAS-before-RAS cycle happens, so as long as you do this kind of refresh once every 15us everything will work.
-- Robin Grindley (firstname.lastname@example.org), January 30, 1999.